1. Field of the Invention
This invention relates to a comparator circuit, particularly to a comparator circuit providing the hysteresis characteristic which does not change the hysteresis width even if the power supply voltage changes.
2. Description of the Prior Art
In case of configurating a comparator circuit with an IC and giving the hysteresis characteristic to said comparator circuit, the hysteresis width is determined ordinarily with power supply voltage and resistance ratio. In addition, in the case of an integrated circuit which can set from outside the power supply current and bias current such as a low power integrated circuit, such hysteresis width is determined by said current or internal resistance. The power supply voltage is comparatively constant but in some cases changes considerably.
FIG. 1 shows the structure of existing ordinary comparator circuit. In FIG. 1, 10 is the high gain differential amplifier having the input terminal (positive side) 1, reference terminal 2 (negative side) and output terminal 3, and its input terminal 1 is connected to the input voltage terminal 4, while the reference terminal 2 to the reference voltage terminal 5. To the input voltage terminal 4, an input voltage V.sub.i is applied while to the reference voltage terminal 5, the reference voltage V.sub.r is applied. When V.sub.i (1)&lt;V.sub.r (2); where V.sub.i (1) is an input voltage at the input terminal 1 and V.sub.r (2) is the reference voltage at the reference terminal 2, the differential amplifier 10 outputs an output voltage V.sub.0 of L (low) level to the output terminal 3, and when V.sub.i (1)&gt;V.sub.r (2), an output voltage V.sub.0 of H (high) level.
The proportional operation area is distributed in the vicinity, where V.sub.i (1)=V.sub.r (2) but when the gain is high, such operation area is very narrow and V.sub.0 is considered to change in the form of step when V.sub.i (1)=V.sub.r (2) as shown in FIG. 2.
When an output voltage V.sub.0 is fed back to the input terminal 1 of such differential amplifier 10 via the resistor 12 (R.sub.f), the hysteresis characteristic having the width W is obtained as shown in FIG. 2. In FIG. 1, the input voltage terminal 4 to which an input voltage V.sub.i is applied has an input resistance R.sub.in (R.sub.in &lt;R.sub.f) but it is omitted in the drawing.
In FIG. 1, if an output voltage V.sub.0 becomes H (high) level, for example, an input voltage V.sub.i (1) is boosted by such H level. Therefore, V.sub.0 does not become L (low), because the relation V.sub.i (1)&lt;V.sub.r (2) is not established if an input voltage V.sub.i (4) is not lowered by that as much as boosted or more. In addition, when an output voltage V.sub.0 changes to H from L, an output voltage V.sub.0 becomes H only when an input voltage V.sub.i (1) is lowered by means of the feedback resistance 12 and resultingly V.sub.i (4) becomes higher than that when the feedback resistance 12 is not used.
The hysteresis width W of the comparator circuit having such hysteresis characteristic is influenced by the power supply voltage V.sub.cc. Namely, the H level output voltage V.sub.0 is determined by the power supply voltage V.sub.cc and becomes small when the power supply voltage is lowered. Therefore, the circuit shown in FIG. 1 has a disadvantage that a value of input voltage V.sub.i (4) which changes from H level to L or from L level to H and resultingly the hysteresis width W also changes.